DocumentCode
2854994
Title
A new methodology for the design centering of IC fabrication processes
Author
Low, K.K. ; Director, S.W.
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
1989
fDate
5-9 Nov. 1989
Firstpage
194
Lastpage
197
Abstract
A practical methodology that can be applied to optimize the process yield of IC fabrication lines is described. The yield maximization problem is first reformulated into a deterministic design centering problem. Macromodeling and problem decomposition are then applied to solve the design centering problem efficiently. The effectiveness of this methodology is illustrated through a simulation example involving a CMOS process adopted from an industrial line.<>
Keywords
CMOS integrated circuits; digital simulation; electronic engineering computing; integrated circuit manufacture; optimisation; CMOS; IC fabrication; decomposition; deterministic design centering; industrial line; process yield; yield maximization; CMOS integrated circuits; CMOS process; Design methodology; Fabrication; Fluctuations; Performance analysis; Process control; Process design; Textile industry; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-1986-4
Type
conf
DOI
10.1109/ICCAD.1989.76934
Filename
76934
Link To Document