Enabling true design for manufacturability

Summary form only given. Without any doubt, design-for-manufacturability (DFM) has been the hottest buzzword for the last couple of years. This is quite justifiable by the enormous challenges in nanometer technology nodes and ever increasing design-process interactions. As a result, virtually all EDA companies have focused on providing "DFM solutions". Since the concept of DFM covers an extremely broad spectrum of tasks, from the system level all the way to the manufacturing process, many of these DFM solutions are just design verification tasks re-labeled. We provide a more thorough classification of various DFM activities with emphasis on the design tasks. We also discuss the necessary condition to enable true DFM, i.e., the comprehensive characterization of the design-process interactions. We present a complete process characterization methodology that is capable of extracting all the salient process variations for a full set of product design attributes. We illustrate our talk by showing the yield loss Pareto for the leading technology nodes that cover all the dominant yield loss phenomena, including random, systematic and parametric mechanisms. We also demonstrate examples of design flows that take advantage of such a comprehensive characterization together with silicon results demonstrating the advantages of true DFM.