Required dynamic range and accuracy of electronic synapses for character recognition applications

Design requirements of electronic synapses and neurons which are used for printed English character recognition, exclusive-OR, and parity check are investigated. On-chip learning strategies for both digital and analog VLSI neural architectures are also described. Experimental results show that the learning process requires a more-than-twice-higher synapse accuracy than the retrieving process. With current silicon technologies, the separate process strategy of off-chip learning and on-chip retrieving can be appropriate to integrate more synapses and neurons into a limited die area