Architectures for analog VLSI implementation of neural networks for solving linear equations with inequality constraints

Author

Cichocki, A. ; Ramirez-Angulo, J. ; Unbehauen, R.

Author_Institution

Warsaw Tech. Univ., Poland

Volume

3

fYear

1992

fDate

10-13 May 1992

Firstpage

1529

Abstract

A novel algorithm for solving generalized systems of linear equations subject to linear inequalities is proposed. The algorithm is robust with respect to wild (spiky) noise and outliers. The algorithm is expressed completely in differential equations. An OTA (operational transconductance amplifier)-based implementation of the algorithm as an analog VLSI circuit in CMOS technology is discussed. One of the many possible applications of the proposed techniques is the implementation of cellular neural networks with real-time on-chip learning capabilities

Keywords

CMOS integrated circuits; VLSI; analogue processing circuits; learning (artificial intelligence); linear differential equations; neural chips; operational amplifiers; CMOS technology; OTA; analog; cellular neural networks; differential equations; implementation; inequality constraints; linear equations; neural networks; operational transconductance amplifier; outliers; real-time on-chip learning capabilities; CMOS analog integrated circuits; CMOS technology; Cellular neural networks; Circuit noise; Differential equations; Neural networks; Noise robustness; Operational amplifiers; Transconductance; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.230208

Filename

230208