Title :
EFL logic family for LSI
Author_Institution :
Hewlett-Packard Co., Palo Alto, CA, USA
Abstract :
A highly-efficient LSI logic family combining the advantages of multi-emitter structures with the performance of ECL logic will be discussed. Simplified gate structure has been found to reduce propagation delay, power and number of logic levels required for logic function realization. Conventional processing affords 2-5 pJ performance.
Keywords :
Boolean functions; Circuits; Clocks; Flip-flops; Large scale integration; Latches; Logic design; Pulse inverters; Resistors; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1973 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1973.1155199
