DocumentCode
285571
Title
A new clock feedthrough reduction circuit in switched-current filters
Author
Song, Minkyu ; Lee, Yongman ; Kim, Wonchan
Author_Institution
Dept. of Electron. Eng., Seoul Nat. Univ., South Korea
Volume
3
fYear
1992
fDate
10-13 May 1992
Firstpage
1396
Abstract
A novel clock feedthrough reduction circuit which is helpful in the design of switched-current filters is proposed. This circuit uses the cancellation technique. A switched-current FIR (finite impulse response) filter adopting the proposed circuit is designed. Simulation of the prototype filter circuit reveals good results. It has a small chip area and higher operating frequency in comparison with the conventional methods
Keywords
active filters; network synthesis; sampled data systems; switched filters; FIR filter; analogue sampled data filter; cancellation technique; chip area; clock feedthrough reduction circuit; operating frequency; switched-current filters; Capacitance; Circuit simulation; Clocks; Finite impulse response filter; Frequency; MOSFETs; Switches; Switching circuits; Virtual prototyping; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0593-0
Type
conf
DOI
10.1109/ISCAS.1992.230242
Filename
230242
Link To Document