DocumentCode :
2855917
Title :
High-speed adder and subtractor using Gunn devices
Author :
Isobe, Takanori ; Nakamura, T. ; Goto, Gensuke
Author_Institution :
Fujitsu Laboratories, Ltd., Kawasaki, Japan
Volume :
XVI
fYear :
1973
fDate :
14-16 Feb. 1973
Firstpage :
96
Lastpage :
97
Abstract :
This paper will describe a computer study of two-dimensional domain behavior for the design of new high-speed carry generators. Using these devices, the computation time of 30-40 bit full adder and subtractor can be reduced to less than 1 ns.
Keywords :
Adders; Circuits; Delay effects; Electrodes; Equations; Gunn devices; Inhibitors; Logic devices; Network address translation; Signal generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1973 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1973.1155217
Filename :
1155217
Link To Document :
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