Non-recursive switched-capacitor decimator and interpolator circuits

Author

Wu, Chun-Yu ; Huang, Shou-Yuan ; Yu, Tsai-Chung ; Shieu, Yie-Yuan

Author_Institution

Nat. Chiao Tung Univ., Hsin-Chu, Taiwan

Volume

3

fYear

1992

fDate

10-13 May 1992

Firstpage

1215

Abstract

Non-recursive switched-capacitor decimator and interpolator circuits are developed and analyzed. Their circuit structures are simple and the design procedure is concise and direct. Moreover, they have the advantages of fewer clock phases, low sensitivities to component and power-supply variations, good noise performance, and large dynamic range. Two design examples are presented. The consistency of simulation and theoretical results prove the correctness and usefulness of the proposed circuits

Keywords

analogue processing circuits; differentiating circuits; interpolation; switched capacitor filters; SC differentiator; circuit structures; decimator circuits; design procedure; filter; interpolator circuits; large dynamic range; low sensitivities; multirate signal processing; noise performance; nonrecursive switched capacitor circuits; simulation; Clocks; Digital signal processing; Finite impulse response filter; Frequency; Phase distortion; Radar antennas; Radar signal processing; Sampling methods; Switching circuits; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.230306

Filename

230306