A CMOS continuous-time current-mode filter technique

Author

Lee, Sang-Soo ; Zele, Rajesh H. ; Allstot, David J. ; Liang, Guojin

Author_Institution

Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

Volume

4

fYear

1992

fDate

3-6 May 1992

Firstpage

2021

Abstract

A CMOS continuous-time current mode filtering technique is described. A differential current-mode integrator was designed, fabricated, and used in a leapfrog configuration to realize lowpass ladder filters. A fifth-order lowpass filter with a -3-dB cutoff frequency of 40 MHz was achieved with a power dissipation of 28 mW in a 2-μm n-well CMOS technology. The filter cutoff frequency was tuned by simply changing the bias current to the filter. A third-order elliptic lowpass filter was also integrated to verify the implementation of transmission zeros. Measured and simulated results agreed closely, and the active filter area was only 0.056 mm²/pole

Keywords

CMOS integrated circuits; active filters; integrating circuits; ladder networks; low-pass filters; 2 micron; 28 mW; 40 MHz; CMOS; active filter area; bias current; continuous-time current-mode filter technique; cutoff frequency; differential current-mode integrator; leapfrog configuration; lowpass ladder filters; n-well CMOS technology; power dissipation; third-order elliptic lowpass filter; transmission zeros; CMOS process; CMOS technology; Capacitance; Circuits; Cutoff frequency; Dynamic range; Filtering; Filters; Magnetic separation; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.230379

Filename

230379