DocumentCode
2857029
Title
Clock trees: differential or single ended?
Author
Sekar, Deepak C.
Author_Institution
Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2005
fDate
21-23 March 2005
Firstpage
548
Lastpage
553
Abstract
A low-swing differential clock distribution scheme is presented, and is compared with widely used single ended clock distribution. Test chips based on these two clocking styles are designed with 1 GHz clocks in a 90 nm technology. Low-swing differential clock trees are seen to have 25-42% less sensitivity to power supply noise and 6% less sensitivity to manufacturing variations than single ended clock trees, which leads to significant savings in skew and jitter. Another important contribution is the development of techniques to design robust single ended and differential clock trees.
Keywords
clocks; integrated circuit design; integrated circuit noise; jitter; nanoelectronics; random noise; trees (mathematics); 1 GHz; 90 nm; clock distribution scheme; jitter; low-swing differential clock trees; manufacturing variations; power supply noise; sensitivity; single ended clock trees; skew; Clocks; Crosstalk; Delay; Jitter; Manufacturing processes; Power supplies; Testing; Uncertainty; Voltage; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality of Electronic Design, 2005. ISQED 2005. Sixth International Symposium on
Print_ISBN
0-7695-2301-3
Type
conf
DOI
10.1109/ISQED.2005.31
Filename
1410642
Link To Document