Title :
MCD-to-m-valued and m-valued-to-MCD converters
Author :
Lu, Huizhu ; Lee, Samuel C.
Author_Institution :
Dept. of Comput. & Inf. Sci., Oklahoma State Univ., Stillwater, OK, USA
Abstract :
Two general algorithms to perform conversions between m-valued (MV) numbers and m-nary-coded-decimal (MCD) numbers for any radix m>1 are proposed. Although the algorithms are described in terms of shift and addition operations, they can be implemented by serial-parallel bit-processing using read-only memories (ROMs). Formulas for computing the conversion speed are given. A comparison of the conversion speed for various different values of m is included.<>
Keywords :
convertors; many-valued logics; MCD-to-m-valued convertors; addition operations; m-valued-to-MCD converters; read-only memories; serial-parallel bit-processing; shift operations; Circuit synthesis; Computer science; Costs; Encoding; Geometry; Logic design; Logic devices; Process design; Registers; Very large scale integration;
Conference_Titel :
Multiple-Valued Logic, 1988., Proceedings of the Eighteenth International Symposium on
Conference_Location :
Palma de Mallorca, Spain
Print_ISBN :
0-8186-0859-5
DOI :
10.1109/ISMVL.1988.5196
