A genetic gate matrix layout algorithm [CMOS circuits]

The authors describe a novel approach for generating a gate matrix style layout. They present a genetic algorithm for determining the order of the polysilicon columns in the layout, which is the first step in generating a gate matrix style layout. The algorithm operates on a set of solutions and produces new solutions through the application of three genetic operators: crossover, mutation, and inversion. These operators search the solution space by combining partial solutions from the current set of solutions and by modifying the current set of solutions. By combining partial solutions to generate new ones, this method has the ability to find compact layouts for circuits that contain repeated structures. The algorithm was tested on several standard circuits and produced results as good as, or superior to, other published results