• DocumentCode
    2857671
  • Title

    Custom-Enabled System Architectures for High End Computing

  • Author

    Sterling, Thomas ; Kogge, Peter

  • Author_Institution
    California Inst. of Technol.
  • fYear
    2004
  • fDate
    12-14 Jan. 2004
  • Firstpage
    30
  • Lastpage
    39
  • Abstract
    The US Federal Government has convened a major committee to determine future directions for government sponsored high end computing system acquisitions and enabling research. The High End Computing Revitalization Task Force was inaugurated in 2003 involving all Federal agencies for which high end computing is critical to meeting mission goals. As part of the HECRTF agenda, a multi-day community wide workshop was conducted involving experts from academia, industry, and the national laboratories and centers to provide the broadest perspective on important issues related to the HECRTF purview. Among the most critical issues in establishing future directions is the relative merits of commodity based systems such as clusters and MPPs versus custom system architecture strategies. This paper presents a perspective on the importance and value of the custom architecture approach in meeting future US requirements in supercomputing. The contents of this paper reflect the ideas of the participants of the working group chartered to explore custom enabled system architectures for high end computing. As in any such consensus presentation, while this paper captures the key ideas and tradeoffs, it does not exactly match the viewpoint of any single contributor, and there remains much room for constructive disagreement and refinement of the essential conclusions
  • Keywords
    multiprocessing systems; parallel architectures; High End Computing Revitalization Task Force; MPPs; US Federal Government; clusters; computing system acquisitions; custom system architecture; custom-enabled system architectures; high end computing; supercomputing; Computer architecture; Computer networks; Concurrent computing; Costs; High performance computing; Laboratories; Memory management; Microprocessors; Time sharing computer systems; US Government;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Innovative Architecture for Future Generation High-Performance Processors and Systems, 2004. Proceedings
  • Conference_Location
    Maui, HI
  • ISSN
    1537-3223
  • Print_ISBN
    0-7695-2205-X
  • Type

    conf

  • DOI
    10.1109/IWIA.2004.10014
  • Filename
    1410678