DocumentCode
2858039
Title
A monolithic 16 x 16 digital multiplier
Author
McIver, G. ; Miller, Ross ; O´Shaughnessy, T.
Author_Institution
TRW Systems Group, Redondo Beach, CA, USA
Volume
XVII
fYear
1974
fDate
15-13 Feb. 1974
Firstpage
54
Lastpage
55
Abstract
The design, fabrication and testing of a 16 × 16 multiplier chip, will be described. The circuit contains 17,000 transistors and resistors on a 301 × 279-mil chip and does a multiplication in less than 350 ns.
Keywords
Aerospace electronics; Fabrication; Large scale integration; Lead time reduction; Logic circuits; Pulse inverters; Registers; Resistors; Signal restoration; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1974 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1974.1155352
Filename
1155352
Link To Document