Title :
A high-speed logic LSI using diffusion self-aligned enhancement depletion MOST
Author :
Ohta, K. ; Morimoto, Masayuki ; Saitoh, Masatoshi ; Fukuda, Toshio ; Morino, A. ; Shimizu, Kazuo ; Hayashi, Yasuhiro ; Tarui, Yoichiro
Author_Institution :
NEC Corp., Ltd., Kawasaki, Japan
Abstract :
Sub-nanosecond, sub-picojoule gates with standard photolithographic technology have been realized using a DSAED-MOS ring oscillator. This paper will describe a high-speed (2.9 ns/2pJ) logic LSI, using this unit gate design.
Keywords :
High speed integrated circuits; Ion implantation; Laboratories; Large scale integration; Logic circuits; Logic devices; Logic gates; Ring oscillators; Threshold voltage; Voltage control;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1975 IEEE International
DOI :
10.1109/ISSCC.1975.1155361
