Title :
A precision trim technique for monolithic analog circuits
Author_Institution :
Precision Monolithics, Inc., Santa Clara, CA, USA
Abstract :
A precision shortable diode trim design applied at the wafer test phase, will be described, citing adjustment of op-amp offset to 2.5 μV and drifts to less than 0.6 μV/°C.
Keywords :
Analog circuits; Circuit noise; Circuit testing; Equivalent circuits; Instruments; Operational amplifiers; Semiconductor diodes; Temperature; Voltage; Zinc;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1975 IEEE International
DOI :
10.1109/ISSCC.1975.1155393
