DocumentCode :
2859136
Title :
LSI test strategies: Present and future
Author :
Finch, T.
Author_Institution :
Bell Labs., Murray Hill, NJ, USA
Volume :
XVIII
fYear :
1975
fDate :
27426
Firstpage :
159
Lastpage :
159
Abstract :
If you can´t measure it, you don´t know it. If you don´t know it, economic catastrophy usually strikes. Testability must be planned at the LSI concept, designed in, and with an implemented economical concern to insure an LSI payoff. These vital issues will be appraised.
Keywords :
Circuit testing; Costs; Large scale integration; Logic devices; Logic testing; Microprocessors; Pins; Sequential analysis; System testing; Test equipment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1975 IEEE International
Type :
conf
DOI :
10.1109/ISSCC.1975.1155424
Filename :
1155424
Link To Document :
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