Self-timed boundary-scan cells for multi-chip module test

This communication presents a self-timed scan-path architecture, to be used in a conventional synchronous environment, and with basic application in digital testing in a Smart-Substrate MCM. Three different self-timed asynchronous scan cells are proposed (Sense, Drive and Drive and Sense cells) that can be connected to form a self-timed scan-path. The main advantage is that no global test clock is needed, avoiding clock skew and synchronization faults in test mode