Title : 
High speed serializing/de-serializing design-for-test method for evaluating a 1 GHz microprocessor
         
        
            Author : 
Heidel, David ; Dhong, Sang ; Hofstee, Peter ; Immediato, Michael ; Nowka, Kevin ; Silberman, Joel ; Stawiasz, Kevin
         
        
            Author_Institution : 
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
         
        
        
        
        
        
            Abstract : 
As microprocessor speeds approach 1 GHz and beyond the difficulties of at-speed testing continue to increase. In particular, automated test equipment which operates at these frequencies is very limited. This paper discusses a design-for-test method which serializes parallel circuit inputs and de-serializes circuit outputs to achieve 1 GHz operation on test equipment operating at frequencies below 100 MHz. This method has been used to successfully characterize the operation of a 1 GHz microprocessor chip
         
        
            Keywords : 
automatic test equipment; computer testing; design for testability; integrated circuit testing; microprocessor chips; very high speed integrated circuits; 1 GHz; automated test equipment; circuit outputs; design-for-test; microprocessor chip; microprocessor speeds; parallel circuit inputs; Accuracy; Circuit testing; Clocks; Coaxial cables; Design for testability; Frequency synchronization; Microprocessor chips; System testing; Test equipment; Timing;
         
        
        
        
            Conference_Titel : 
VLSI Test Symposium, 1998. Proceedings. 16th IEEE
         
        
            Conference_Location : 
Monterey, CA
         
        
        
            Print_ISBN : 
0-8186-8436-4
         
        
        
            DOI : 
10.1109/VTEST.1998.670873