Sampling techniques of non-equally probable faults in VLSI systems

The purpose of this paper is to present a novel methodology for defect-oriented (DO) fault sampling, and its implementation in a new extraction tool, lobs. The methodology is based on the statistics theory, and on the application of the concepts of estimation of totals over subpopulations and stratified sampling to the fault sampling problem. The proposed sampling methodology applies to non-equally probable DO faults, exhibiting a wide range of probabilities of occurrence, and leads to confidence intervals similar to the ones obtained with equally probable faults. ISCAS´85 benchmark circuits are laid out and lobs used to ascertain the results