• DocumentCode
    2860068
  • Title

    A design for testability study on a high performance automatic gain control circuit

  • Author

    Lechner, A. ; Richardson, A. ; Hermes, B. ; Ohletz, M.

  • Author_Institution
    Dept. of Eng., Lancaster Univ., UK
  • fYear
    1998
  • fDate
    26-30 Apr 1998
  • Firstpage
    376
  • Lastpage
    385
  • Abstract
    A comprehensive testability study on a commercial automatic gain control circuit is presented which aims to identify design for testability (DfT) modifications to both reduce production test cost and improve test quality. A fault simulation strategy based on layout extracted faults has been used to support the study. The paper proposes a number of DfT modifications at the layout, schematic and system levels together with testability. Guidelines that may well have generic applicability. Proposals for using the modifications to achieve partial self test are made and estimates of achieved fault coverage and quality levels presented
  • Keywords
    automatic gain control; circuit CAD; design for testability; mixed analogue-digital integrated circuits; automatic gain control circuit; design for testability; fault coverage; fault simulation strategy; layout; production test cost; schematic; test quality; testability study; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Costs; Design for testability; Gain control; Performance gain; Production; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 1998. Proceedings. 16th IEEE
  • Conference_Location
    Monterey, CA
  • ISSN
    1093-0167
  • Print_ISBN
    0-8186-8436-4
  • Type

    conf

  • DOI
    10.1109/VTEST.1998.670893
  • Filename
    670893