• DocumentCode
    2860506
  • Title

    Fault isolation with intermediate checks of end-to-end checksums in the Time-Triggered System-on-Chip Architecture

  • Author

    Paulitsch, H. ; Paukovits, C. ; Salloum, C. El

  • Author_Institution
    Real-Time Syst. Group, Vienna Univ. of Technol., Vienna, Austria
  • fYear
    2009
  • fDate
    8-10 July 2009
  • Firstpage
    90
  • Lastpage
    99
  • Abstract
    This paper deploys end-to-end message checksums for error detection in the time-triggered system-on-chip architecture (TTSoCA). The end-to-end checksums are not only checked at the end, but also intermediately in the communication subsystem of the system-on-chips (SoCs) concurrently with the message transmission in order to isolate faults: if a message transmission error occurs, the goal is to pinpoint whether the fault has originated in an IP core, in the communication subsystem, or in a gateway.
  • Keywords
    semiconductor device reliability; system-on-chip; IP core; TTSoCA; end-to-end message checksum; error detection; fault isolation; gateway; time-triggered system-on-chip architecture; Circuit faults; Costs; Error analysis; Fault detection; Hardware; Isolation technology; Real time systems; Semiconductor device reliability; Semiconductor devices; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Embedded Systems, 2009. SIES '09. IEEE International Symposium on
  • Conference_Location
    Lausanne
  • Print_ISBN
    978-1-4244-4109-9
  • Electronic_ISBN
    978-1-4244-4110-5
  • Type

    conf

  • DOI
    10.1109/SIES.2009.5196200
  • Filename
    5196200