DocumentCode :
2860785
Title :
A flexible design flow for software IP binding in commodity FPGA
Author :
Gora, Michael A. ; Maiti, Abhranil ; Schaumont, Patrick
Author_Institution :
Bradley Dept. of Electr.&Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
fYear :
2009
fDate :
8-10 July 2009
Firstpage :
211
Lastpage :
218
Abstract :
Software intellectual property (SWIP) is a critical component of increasingly complex FPGA based system on chip (SOC) designs. As a result, developers want to ensure that their SWIP sources are protected from being exposed to an unauthorized party and are restricted to run only on a trusted FPGA platform. This paper proposes a novel design flow for protecting SWIP by binding it to a specific FPGA platform. We accomplish this by leveraging the qualities of a physical unclonable function (PUF) and a tight integration of hardware and software security features. A prototype implementation demonstrates our design flow to successfully protect a SWIP by encryption using a 128 bit FPGA-unique key extracted from a PUF.
Keywords :
cryptography; field programmable gate arrays; industrial property; system-on-chip; SOC design; commodity FPGA; encryption; flexible design flow; hardware security; physical unclonable function; software IP binding; software intellectual property; software security; system on chip design; Field programmable gate arrays; Hardware; Intellectual property; Protection; Prototypes; Security; Software design; Software prototyping; Software quality; System-on-a-chip; FPGA; Intellectual Property; Physical Unclonable Functions; Security Applications; Software Binding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Embedded Systems, 2009. SIES '09. IEEE International Symposium on
Conference_Location :
Lausanne
Print_ISBN :
978-1-4244-4109-9
Electronic_ISBN :
978-1-4244-4110-5
Type :
conf
DOI :
10.1109/SIES.2009.5196217
Filename :
5196217
Link To Document :
بازگشت