• DocumentCode
    2860834
  • Title

    A high-speed 16K-bit NMOS RAM

  • Author

    Itoh, Kenji ; Shimohigashi, K. ; Chiba, Kazuya ; Taniguchi, Kazuhiro ; Kawamoto, Yasutaka

  • Author_Institution
    Hitachi Ltd., Tokyo, Japan
  • Volume
    XIX
  • fYear
    1976
  • fDate
    18-20 Feb. 1976
  • Firstpage
    140
  • Lastpage
    141
  • Abstract
    A 16K-BIT NMOS dynamic memory array, designed lor high speed main frame memory applications, will be described. High speed has been achieved with a sense circuit for one tramistorcell, in combination with improved N-channel silicon-gate technology.
  • Keywords
    Circuit testing; Clocks; DC generators; MOS devices; Preamplifiers; Random access memory; Read-write memory; Signal generators; Timing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1976.1155530
  • Filename
    1155530
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2860834