• DocumentCode
    2860999
  • Title

    1ms VLSI vision chip system and its applications

  • Author

    Ishikawa, Masatoshi

  • Author_Institution
    Dept. of Math. Eng. & Inf. Phys., Tokyo Univ., Japan
  • fYear
    1998
  • fDate
    14-16 Apr 1998
  • Firstpage
    214
  • Lastpage
    219
  • Abstract
    With the progress of silicon integration technology, visual information processing architecture has come a great change in the compactness of high performance processing circuits. In other words, the image processor is no longer considered as a desktop size equipment but rather as one chip information processing module with photodetector. The paper discusses the processing architecture for visual information processing in terms of the integrated massively parallel processing. A vision chip with general purpose processing elements is described and some examples of 1 ms image processing using the architectures is shown. The sampling rate of 1 ms leads to a new generation of image processing technology
  • Keywords
    VLSI; image processing equipment; microprocessor chips; parallel architectures; 1 ms; VLSI vision chip system; chip information processing module; general purpose processing elements; high performance processing circuits; image processing technology; image processor; integrated massively parallel processing; photodetector; sampling rate; silicon integration technology; vision chip; visual information processing; visual information processing architecture; Circuits; Image generation; Image processing; Image sampling; Information processing; Machine vision; Parallel processing; Photodetectors; Silicon; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Automatic Face and Gesture Recognition, 1998. Proceedings. Third IEEE International Conference on
  • Conference_Location
    Nara
  • Print_ISBN
    0-8186-8344-9
  • Type

    conf

  • DOI
    10.1109/AFGR.1998.670951
  • Filename
    670951