Title :
A 70-ns 1K MOS RAM
Author :
Pashley, R. ; McCormick, G.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
A 1024-bit static MOS RAM, designed to be fully TTL compatible and operable from a single 5-V supply, will be discussed. Performance of 70 ns was attained by combining depletion-load technology with on-chip substrate bias.
Keywords :
Capacitors; Charge pumps; Circuits; Clamps; Oscillators; Power dissipation; Random access memory; Read-write memory; Temperature distribution; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1976.1155559
