Rapid design of DSP ASIC cores using hierarchical VHDL libraries

Author

McCanny, J.V. ; Hu, Y. ; Ding, T.J. ; Trainor, D. ; Ridge, D.

Author_Institution

Dept. of Electr. & Electron. Eng., Queen´´s Univ., Belfast, UK

fYear

1996

fDate

3-6 Nov. 1996

Firstpage

1344

Abstract

Methods are presented for the rapid design of DSP ASICs based on the use of a series of hierarchical VHDL libraries which are portable across many silicon foundries. These allows complex DSP silicon systems to be developed in a small fraction of the time normally required. Resulting designs are highly competitive with those developed using more conventional methods. The approach is illustrated using several examples. These include ADPCM codecs, as well as DCT and FFT cores.

Keywords

application specific integrated circuits; codecs; differential pulse code modulation; digital signal processing chips; discrete cosine transforms; fast Fourier transforms; hardware description languages; integrated circuit design; modulation coding; ADPCM codecs; DCT cores; DSP ASIC cores; FFT cores; Si foundries; hierarchical VHDL libraries; rapid design; Application specific integrated circuits; Arithmetic; Codecs; Design engineering; Digital signal processing; Digital signal processing chips; Discrete cosine transforms; Silicon; Software algorithms; Software libraries;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1996. Conference Record of the Thirtieth Asilomar Conference on

Conference_Location

Pacific Grove, CA, USA

ISSN

1058-6393

Print_ISBN

0-8186-7646-9

Type

conf

DOI

10.1109/ACSSC.1996.599167

Filename

599167