DocumentCode :
2861477
Title :
A 64K-bit block-addressed charged-coupled memory device
Author :
Mohsen, A. ; Bower, R. ; Wilder, M. ; Erb, Dominik
Author_Institution :
Mnemonics, Inc., Cupertino, CA, USA
Volume :
XIX
fYear :
1976
fDate :
18-20 Feb. 1976
Firstpage :
180
Lastpage :
181
Abstract :
This paper will describe the design and performance of a 65,536-bit charge-coupled serial memory device. Operated at a data rate of 1 MHz, the mean access time is 2 ms and power dissipation 0.5 μm/bit.
Keywords :
Charge coupled devices; Circuits; Clocks; Costs; Decoding; Electrodes; Electrons; Frequency; Magnetic memory; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1976.1155568
Filename :
1155568
Link To Document :
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