Title :
High level synthesis of an (N,K) Reed-Solomon encoder using VHDL
Author :
Smith, S. ; Benaissa, M. ; Taylor, D.
Author_Institution :
Div. of Electron. & Commun., Sch. of Eng., Huddersfield Univ., UK
Abstract :
The University of Huddersfield in collaboration with AWE is running a number of research programmes with the aim of creating a high-level interface (HLI) between the codec algorithms and parameters for the Reed-Solomon (RS) code, and a generic hardware circuit description. In VHDL these HDL models can then be submitted to a silicon compiler to give a complete path from algorithm to silicon. The paper outlines the work completed to-date with the emphasis on the use of VHDL within the project
Keywords :
Reed-Solomon codes; circuit CAD; codecs; specification languages; Reed-Solomon encoder; VHDL; hardware circuit description; high-level interface;
Conference_Titel :
VHDL (Very High Speed Integrated Circuits Hardware Description Language) - Applications and CAE Advances, IEE Colloquium on (Digest No.1993/076)
Conference_Location :
London