DocumentCode :
2862417
Title :
A fast 1024-bit bipolar RAM using JFET load devices
Author :
Phan, M. ; Shier, J. ; Evans, A.
Author_Institution :
Intersil, Inc., Cupertino, CA, USA
Volume :
XX
fYear :
1977
fDate :
16-18 Feb. 1977
Firstpage :
70
Lastpage :
71
Keywords :
Bipolar integrated circuits; Doping; Ion implantation; JFET integrated circuits; Parasitic capacitance; Random access memory; Read-write memory; Resistors; Schottky diodes; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1977 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1977.1155633
Filename :
1155633
Link To Document :
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