A Two-Phase Mapping Method for Parallel Applications Simulation

Author

Fang, Jianbin ; Xu, Chuanfu ; Che, Yonggang ; Weng, Yufen ; Wang, Zhenghua

Author_Institution

Nat. Lab. for Parallel & Distrib. Process., Nat. Univ. of Defense Technol., Changsha, China

fYear

2009

fDate

11-13 Dec. 2009

Firstpage

1

Lastpage

4

Abstract

Efficient mapping of logical processes to physical processes is one of key technologies to accelerate parallel performance simulation. Aiming at minimizing the communications between SMP nodes and between host physical processes, this paper presents a novel method named TPsmp-LP³M. It automatically extracts communication pattern of logical processes from trace and then generates a two-phase mapping from logical processes to SMP clusters. Experimental results show that TPsmp-LP³M can outperform the regular mapping method by up to 20.2%.

Keywords

multiprocessing systems; parallel programming; resource allocation; SMP cluster; SMP node; TPsmp-LP³M; communication pattern; load balance; logical process mapping; parallel applications simulation; parallel performance simulation; physical process; two-phase mapping; Application software; Bandwidth; Computational modeling; Computer simulation; Concurrent computing; Discrete event simulation; Distributed processing; Laboratories; Parallel processing; Predictive models;

fLanguage

English

Publisher

ieee

Conference_Titel

Computational Intelligence and Software Engineering, 2009. CiSE 2009. International Conference on

Conference_Location

Wuhan

Print_ISBN

978-1-4244-4507-3

Electronic_ISBN

978-1-4244-4507-3

Type

conf

DOI

10.1109/CISE.2009.5366171

Filename

5366171