DocumentCode

2863242

Title

A masterslice LSI for subnanosecond random logic

Author

Braeckelmann, W. ; Fritzsche, H. ; Kroos, F. ; Trinkl, W. ; Wilhelm, W.

Author_Institution

Siemens AG, Munich, Germany

Volume

XX

fYear

1977

fDate

16-18 Feb. 1977

Firstpage

108

Lastpage

109

Keywords

Delay; Large scale integration; Latches; Logic circuits; Logic design; Multiplexing; Pins; Power dissipation; Resistors; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference. Digest of Technical Papers. 1977 IEEE International

Conference_Location

Philadelphia, PA, USA

Type

conf

DOI

10.1109/ISSCC.1977.1155689

Filename

1155689