Title :
Design and Implementation of CRC Based on FPGA
Author :
Zhang, Tongsheng ; Ding, Qun
Author_Institution :
Key Lab. of Electron. Eng., Heilongjiang Univ., Harbin, China
Abstract :
In modern communication systems, high-speed and high-reliability is the two most important yardsticks, but digital code may be distorted during the transmission, so we should and must encoding some redundant bits to assure the received code correct to enhance the reliability of the communication systems. This thesis is to expound the encoding and decoding theory of CRC and design it by VHDL language and verify the correctness of CRC.
Keywords :
cyclic redundancy check codes; decoding; encoding; field programmable gate arrays; hardware description languages; logic design; CRC; FPGA; VHDL language; cyclic redundancy check; decoding; digital code; encoding; Cyclic redundancy check codes; Data models; Decoding; Encoding; Field programmable gate arrays; Polynomials; Redundancy; CRC code; FPGA; error-checking;
Conference_Titel :
Innovations in Bio-inspired Computing and Applications (IBICA), 2011 Second International Conference on
Conference_Location :
Shenzhan
Print_ISBN :
978-1-4577-1219-7
DOI :
10.1109/IBICA.2011.44
