DocumentCode :
2864206
Title :
A pseudorandom clocking scheme for a CMOS N-path bandpass filter with 10-to-15 dB spurious leakage improvement
Author :
Thomas, Chris M. ; Leung, Vincent W. ; Larson, Lawrence E.
Author_Institution :
Univ. of California, San Diego, La Jolla, CA, USA
fYear :
2015
fDate :
25-28 Jan. 2015
Firstpage :
105
Lastpage :
107
Abstract :
A pseudorandom clocking scheme for an N-path bandpass filter is presented, which lowers the LO leakage to the filter´s input and output. Measurements of a 65 nm CMOS prototype from 100 MHz to 1.4 GHz demonstrate 15 dB out-of-band rejection, IP1dB of +0 dBm, in-band IIP3 of +22 dBm, out-of-band jammer tolerance of +11 dBm, and LO leakage improvement of 10 dB to 15 dB with magnitude ranging from -60 dBm to -80 dBm.
Keywords :
CMOS analogue integrated circuits; UHF filters; UHF integrated circuits; band-pass filters; CMOS N-path bandpass filter; LO leakage improvement; frequency 100 MHz to 1.4 GHz; pseudorandom clocking scheme; size 65 nm; spurious leakage improvement; Band-pass filters; CMOS integrated circuits; Clocks; Filtering theory; Frequency measurement; Power harmonic filters; Transmission line measurements; Bandpass filter; N-path filtering; SAW-less; passive mixer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio and Wireless Symposium (RWS), 2015 IEEE
Conference_Location :
San Diego, CA
Type :
conf
DOI :
10.1109/RWS.2015.7129715
Filename :
7129715
Link To Document :
بازگشت