DocumentCode :
2864438
Title :
A precision FET-less sample-hold with high charge-to-droop current ratio
Author :
Erdi, G. ; Henneuse, P.
Author_Institution :
Precision Monolithics, Inc., Santa Clara, CA, USA
Volume :
XXI
fYear :
1978
fDate :
15-17 Feb. 1978
Firstpage :
228
Lastpage :
229
Abstract :
This paper will cover a monolithic sample and hold, designed without using FETs. A charging circuit provides 50mA to the hold capacitor, while the super beta output amplifier\´s droop current is 50pA over a 
C range, resulting in a 109charge-to-droop current ratio.
C range, resulting in a 109charge-to-droop current ratio.Keywords :
Bridge circuits; Capacitance; Capacitors; Diodes; Epitaxial layers; FETs; MOSFETs; Power dissipation; Switches; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1978.1155762
Filename :
1155762
Link To Document :
