Title :
Aids to developing testable custom LSI
Author_Institution :
Bell-Northern Research, Ottawa, Canada
Abstract :
The development of adequate, economical tests for custom LSI circuits is a vital, but increasingly difficult task. Custom chips of VLSI circuit complexity will soon be the norm, with ever widening applications in new products. This session will accent approaches to testing and testability of custom LSI. The usefulness of computer aids for circuit design verification and test vector generation, and the merits of rigorous design philosophies which guarantee testability, will be assessed.
Keywords :
Chip scale packaging; Circuit faults; Circuit simulation; Circuit testing; Design automation; Large scale integration; Logic arrays; Logic circuits; Logic design; Logic testing;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1978.1155809
