Title :
Large high density CID imagers
Author :
Brown, D. ; Ghezzo, M. ; Sargent, P.
Author_Institution :
General Electric Research/Development Center, Schenectady, NY, USA
Abstract :
This paper will discuss the fabrication and performance of large (16K, 60K and 78K cells), high density CID self-scanned imager arrays. Small (1.2 × 1.2 mils) overlapping electrode cells using first level polysilicon electrode lines and second level polysilicon or antimony tin oxide electrode lines were utilized.
Keywords :
Capacitance; Circuits; Clocks; Dielectric loss measurement; Electrodes; Etching; Logic arrays; MOSFETs; Metallization; Thermal factors;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1978.1155817
