Title :
Spidergon: a novel on-chip communication network
Author :
Coppola, Marcello ; Locatelli, Riccardo ; Maruccia, Giuseppe ; Pieralisi, Lorem ; Scandurra, Alberto
Abstract :
Summary form only given. The SoC (System on Chip) design demands for novel architectural and circuital solutions to cope with the global wires issue, pushing the on-chip communication as a crucial and precious resource. In the context of the communication centric paradigm and according to a layered based design, it is foreseen that current on-chip shared bus will be, at least partially, replaced by a micronetwork interconnection implementing a flexible packet-based communication (A. Jantsch and H. Tenhunen, "Networks on Chip", Kluwer Academic Publishers, 2003). We state that the availability of an efficient on-chip communication platform is one of the most important enabling factors for the development of efficient and cost effective multi processor SoC in the near and long-term future. This summary presents the low cost, high performance on-chip communication network, called Spidergon, developed by the AST (Advanced System Technology) of STMicroelectronics as the possible evolution of STBus technology.
Keywords :
integrated circuit design; integrated circuit interconnections; multiprocessing systems; network routing; system-on-chip; SoC design; Spidergon on-chip communication network; communication centric paradigm; efficient cost effective multi processor SoC development; flexible packet-based communication; global wires issue; layered based design; micro-network interconnection; on-chip communication; on-chip communication platform; on-chip shared bus; system on chip; Clocks; Communication networks; Costs; Microelectronics; Network topology; Network-on-a-chip; Protocols; Routing; Space technology; System-on-a-chip;
Conference_Titel :
System-on-Chip, 2004. Proceedings. 2004 International Symposium on
Print_ISBN :
0-7803-8558-6
DOI :
10.1109/ISSOC.2004.1411133