DocumentCode
2865766
Title
An NMOS voltage reference
Author
Blauschild, R. ; Tucci, P. ; Muller, Rudolf ; Meyer, Roland
Author_Institution
Signetics Corp., Sunnyvale, CA, USA
Volume
XXI
fYear
1978
fDate
15-17 Feb. 1978
Firstpage
50
Lastpage
51
Abstract
An NMOS temperature-stable voltage reference, affording - in breadboard results - a temperature drift of less than 6 PPM/°C, will be described. Calculations show that less than 2 PPM/°C can be achieved with proper choice of device geometries.
Keywords
Circuits; Difference equations; Implants; Ion implantation; Logic design; MOS devices; MOSFETs; Temperature dependence; Temperature sensors; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1978.1155841
Filename
1155841
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