• DocumentCode
    2865820
  • Title

    A 920 gate masterslice

  • Author

    Nakano, T. ; Tomisawa, O. ; Anami, K. ; Nakaya, M. ; Ohmori, M. ; Ohkura, I.

  • Author_Institution
    Mitsubishi Electronic Corp., Hyogo, Japan
  • Volume
    XXI
  • fYear
    1978
  • fDate
    15-17 Feb. 1978
  • Firstpage
    64
  • Lastpage
    65
  • Abstract
    An MOS masterslice chip with up to 920 gates, 3W dissipation and 3ns/gate propagation delay time for random logic LSIs will be reported.
  • Keywords
    Capacitance; Delay effects; Large scale integration; Pins; Power supplies; Propagation delay; Registers; Ring oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1978.1155845
  • Filename
    1155845
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2865820