Title :
Evaluation of platform architecture performance using abstract instruction-level workload models
Author :
Kreku, J. ; Kauppi, Tarja ; Soininen, Juha-Pekka
Author_Institution :
VTT Electron., Oulu, Finland
Abstract :
Evaluation of platform performance is critical in the optimisation and validation of integrated application domain-specific multiprocessor systems. This work describes a method for creating abstract instruction-level workload models from source code, and a method for modelling multi-processor platforms. The approaches are validated by simulating complex use cases in a multiprocessor platform and comparing some of the results to measurements obtained from a prototype product. The approach is targeted at defining architecture parameters and to feature feasibility studies at product concept creation phase.
Keywords :
circuit simulation; computer architecture; integrated circuit design; integrated circuit measurement; integrated circuit modelling; multiprocessing systems; system-on-chip; abstract instruction-level workload models; architecture parameters; complex use cases; feasibility studies; integrated application domain-specific multiprocessor systems; multiprocessor platforms; optimisation; platform architecture performance evaluation; product concept creation phase; prototype product measurements; Application software; Computer architecture; Computer interfaces; Embedded computing; Embedded system; Energy storage; Hardware; Multiprocessing systems; Portable computers; Space exploration;
Conference_Titel :
System-on-Chip, 2004. Proceedings. 2004 International Symposium on
Print_ISBN :
0-7803-8558-6
DOI :
10.1109/ISSOC.2004.1411143
