DocumentCode
2866111
Title
Analyses of signaling techniques for self-timed systems
Author
Nigussie, Ethiopia ; Tuominen, Johanna ; Isoaho, Jouni
Author_Institution
Dept. of Inf. Technol., Turku Univ., Finland
fYear
2004
fDate
16-18 Nov. 2004
Firstpage
89
Lastpage
92
Abstract
This work presents signaling techniques for global and local on-chip interconnects, namely voltage-mode and current-mode differential signaling and simultaneous bidirectional signaling. In the proposed approach, these techniques were applied along with the self-timed design methodology to the interconnects of the path metric unit of the Viterbi decoder, and to the global on-chip bus segment. The simulations are performed using 0.18 μm technology. These interconnects are compared in terms of power consumption, noise, and speed. The study considered in this paper revealed the possibilities of current-mode signaling in global on-chip interconnects, while for local interconnects, the optimal result is achieved by applying voltage-mode signaling.
Keywords
Viterbi decoding; integrated circuit design; integrated circuit interconnections; integrated circuit noise; signal processing; system-on-chip; timing; 0.18 micron; SoC; Viterbi decoder path metric unit interconnects; current-mode differential signaling; global interconnects; global on-chip bus segment; interconnect noise; interconnect speed; local on-chip interconnects; power consumption; self-timed design methodology; self-timed systems; signaling techniques; simulations; simultaneous bidirectional signaling; system-on-chip design; voltage-mode differential signaling; Decoding; Information technology; Laboratories; Power system interconnection; Power system reliability; Signal analysis; System-on-a-chip; Transmitters; Viterbi algorithm; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip, 2004. Proceedings. 2004 International Symposium on
Print_ISBN
0-7803-8558-6
Type
conf
DOI
10.1109/ISSOC.2004.1411156
Filename
1411156
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