• DocumentCode
    2866148
  • Title

    Access Pattern Based Re-reference Interval Table for Last Level Cache

  • Author

    Yu, Baozhong ; Hu, Yifan ; Ma, Jianliang ; Chen, Tianzhou

  • Author_Institution
    Coll. of Comput. Sci., Zhejiang Univ., Hangzhou, China
  • fYear
    2011
  • fDate
    20-22 Oct. 2011
  • Firstpage
    251
  • Lastpage
    256
  • Abstract
    The memory access stream to the last level cache (LLC) is a filtered version from the upper level caches. There are a large number of cache blocks with long re-reference interval in the LLC. What´s worse, zero reuse blocks are in abundance in the LLC and pollute the LLC for a long time. Access pattern based re-reference interval table (RRIT), here we propose, is an efficient management technology for the LLC. RRIT introduces a table to track consecutive blocks´ re-reference interval. And then predicts the re-reference interval for a new incoming block. RRIT always selects the block with the max re-reference interval as the victim block when a cache replacement issue occurs. Furthermore, we propose a dead block filtering (RRIT-Filter) mechanism based on RRIT. RRIT-Filter bypasses the predicted dead block and improves LLC efficiency. Our evaluations using the SPEC2006 workloads on a single-core with a 2MB LLC show that RRIT and RRIT-Filter outperform LRU replacement on the throughput metric by an average of 6.6% and 8.6% respectively. Our evaluations with 10 multi-programmed workloads on a 4-core CMP with an 8MB shared LLC show that our strategy outperforms LRU replacement on the throughput metric by an average of 23% and 39% respectively.
  • Keywords
    cache storage; information filtering; multiprogramming; storage management; 4-core CMP; LLC; LRU replacement; RRIT-filter; SPEC2006 workloads; dead block filtering mechanism; last level cache block; long re-reference interval; management technology; memory access stream; multiprogrammed workload; pattern based re-reference interval table access; upper level cache replacement; Benchmark testing; Electronics packaging; Indexes; Multicore processing; Power demand; Proposals; System performance; LLC; cache; dead block; multi-core; re-reference; replacement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Computing, Applications and Technologies (PDCAT), 2011 12th International Conference on
  • Conference_Location
    Gwangju
  • Print_ISBN
    978-1-4577-1807-6
  • Type

    conf

  • DOI
    10.1109/PDCAT.2011.13
  • Filename
    6118925