A system-on-a-chip for audio encoding

This project covers the development of a self-contained ´system-on-a-chip´ (SoC) design which allows the lossy compression of digital audio data. Primarily, this is achieved by the creation of a general purpose extensible SoC framework, based around an off-the-shelf central processing unit (CPU) core. The framework allows extension of the CPU by adding custom instructions and data processors which are supported by a collection of customisable fractional arithmetic units. The goal of this design is to allow easy and rapid exploration of the hardware design space when running and accelerating the open-source ´Ogg Vorbis´ audio encoding algorithm. By creating custom acceleration hardware using the framework, a speed increase of around 33%, compared to an unmodified refence encoder, is achieved in an FPGA prototype implementation. This project is the only work we are aware of so far that considers the use of ´Ogg Vorbis´ for encoding in an embedded system.