Title :
Automatic test generation for LSI chips and printed circuit boards
Author :
Bottorff, P. ; France, Robert ; Godoy, H.
Author_Institution :
IBM Corp., Johnson City, NY, USA
Abstract :
This paper will describe automatic test pattern generation methods and results for level sensitive scan design chips and boards, suitable for LSI networks.
Keywords :
Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Design automation; Large scale integration; Logic testing; Printed circuits; System testing; Test pattern generators;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1979.1155891
