Elimination of contamination in the epitaxial process for high-volume power semiconductor device manufacturing

The epitaxial layer in power semiconductor devices is used to set many device parameters such as blocking voltage, unclamped inductive switching (UIS), and on-state resistance (Rdson). Contamination in the epitaxial layer can substantially degrade device performance, especially since it will have current flowing through it because the drain contact is on the backside of the die. Identification, control and elimination of contamination is therefore essential in high-volume device manufacturing where it can have a large negative financial impact. This study details the methodology, tools and techniques employed to identify, control and eliminate contamination, especially metallics from the epitaxial layer growth process