Title :
The design of MOS dynamic RAMs
Author_Institution :
Mosaid, Inc., Ottawa, Canada
Abstract :
The art of MOS RAM design involves the continuous compromise between layout area, performance criteria and internal safety margins. With each new generation, the tradeoffs become more difficult as less space is available for the circuits required to insure performance with safe operation. These trends are illustrated by 4K, 16K and now 64K circuit features.
Keywords :
Circuit testing; Clocks; Coupling circuits; DRAM chips; High power amplifiers; Operational amplifiers; Random access memory; Read-write memory; Signal restoration; Writing;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1979.1155961
