DocumentCode :
2868050
Title :
Accurate power macro-modeling techniques for complex RTL circuits
Author :
Potlapally, Nachiketh R. ; Raghunathan, Anand ; Lakshminarayana, Ganesh ; Hsiao, Michael S. ; Chakradhar, Srimat T.
Author_Institution :
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
fYear :
2001
fDate :
2001
Firstpage :
235
Lastpage :
241
Abstract :
This paper presents novel techniques for the cycle-accurate power macro-modeling of complex RTL components. The proposed techniques are based on the observation that RTL components often exhibit significantly different “power behavior” for different parts of the input space, making it difficult for a single conventional macro-model to accurately estimate the power dissipation over the entire input space. We address this problem by identifying and separating the input space into regions that display “similar” power behavior. We refer to these regions as the power modes of the component. We then construct separate macro-models for each region, and construct a function that, given the input trace to the component, selects an appropriate power mode (and hence macro-model) for use in each cycle. The proposed ideas are complementary to, and improve upon, previously proposed techniques for power macro-modeling such as linear regression, table look-up, power sensitivity, etc. We present experimental results on several practical complex RTL components, and demonstrate that the proposed techniques result in significant reductions (up to 90%) in the error of RTL macro-modeling compared to a gate-level power estimator
Keywords :
circuit CAD; logic CAD; parameter estimation; complex RTL circuits; gate-level power estimator; linear regression; macro-model; macro-models; power macro-modeling; power mode analysis; power sensitivity; table look-up; Circuits; Displays; Information analysis; Linear regression; National electric code; Power dissipation; Power system modeling; Signal design; System-on-a-chip; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2001. Fourteenth International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
0-7695-0831-6
Type :
conf
DOI :
10.1109/ICVD.2001.902666
Filename :
902666
Link To Document :
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