DocumentCode :
2868054
Title :
A 500O-gate I ² L masterslice LSI
Author :
Usami, M. ; Hatta, Y. ; Tanaka, M. ; Yoshi´i, A. ; Adachi, Toru
Author_Institution :
Hitachi, Ltd., Tokyo, Japan
Volume :
XXII
fYear :
1979
fDate :
14-16 Feb. 1979
Firstpage :
58
Lastpage :
59
Abstract :
This paper will describe a high density I2L masterslice LSI consisting of 124 basic block cells and two PLAs for logic functions. Oxide-isolated I2L structures with 
for all four collectors at 100μA injector current have provided 10ns/gate performance.
for all four collectors at 100μA injector current have provided 10ns/gate performance.Keywords :
Current supplies; Delay; Flip-flops; Large scale integration; Logic circuits; Logic devices; Metallization; Pins; Power supplies; Programmable logic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1979.1155976
Filename :
1155976
Link To Document :
