• DocumentCode
    2868211
  • Title

    Adaptive low-jitter LC-based clock distribution

  • Author

    Li-min Lee ; Chih-Kong Ken Yang

  • Author_Institution
    California Univ., Los Angeles, CA
  • fYear
    2007
  • fDate
    11-15 Feb. 2007
  • Abstract
    A low-jitter LC-based clock distribution in 0.13μm CMOS uses a frequency-tuning technique based on a voltage-swing digitizer. Optimum jitter performance is achieved by adaptively adjusting the injection-lock ratio. The efficiency of this technique results in 25% power-savings in the clock buffer for similar or better jitter performance.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; clocks; jitter; 0.13 micron; adaptive low-jitter LC-based clock distribution; frequency-tuning technique; injection-lock ratio; voltage-swing digitizer; Bandwidth; Circuit noise; Injection-locked oscillators; Noise generators; Phase locked loops; Resonant frequency; Signal to noise ratio;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0852-0
  • Type

    conf

  • DOI
    10.1109/ISSCC.2007.373354
  • Filename
    4242325
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2868211